ST STM32L4+ Series Reference Manual page 2091

RM0432
56.4 OTG_FS functional description
56.4.1 OTG_FS block diagram
Power
and
clock control
USB suspend
USB clock at 48 MHz
56.4.2 OTG_FS pin and internal signals
Signal name
OTG_FS_DP
OTG_FS_DM
OTG_FS_ID
OTG_FS_VBUS
OTG_FS_SOF
OTG_FS_NOE
Figure 617. OTG_FS full-speed block diagram
Cortex core
USB Interrupt
USB2.0
OTG FS
core
System clock
domain
1.25 Kbyte
USB data
FIFOs
Table 413. OTG_FS input/output pins
Signal type
Digital input/output USB OTG D+ line
Digital input/output USB OTG D- line
Digital input
Analog input
Digital output
Digital output
RM0432 Rev 6
USB on-the-go full-speed (OTG_FS)
OTG FS
UTMIFS
SOF
USB clock
NOE
domain
USB OTG ID
USB OTG VBUS
USB OTG Start Of Frame (visibility)
USB OTG output enable for D+/D- (visibility)
DP
DM
ID
PHY
V
Universal serial bus
Description
BUS
MSv47468V1
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