Dma Module: On Chip Bus Access Rights, Rmw Support; Dma Module On Chip Bus Master Interfaces - Infineon Technologies TC1728 User Manual

The DMA Module is connected to the FPI Bus and to the LMB Bus with master
interfaces. The DMA LMB Master and the DMA FPI Master is each connected with three
priorities to its On Chip Bus (low, medium and high priority), where it competes against
the other bus masters connected to the On Chip Bus for bus access. The mapping of the
Move Engines and the peripherals connected to the DMA Peripheral Interface to the
DMA Module priorities on the FPI Bus and on the LMB Bus is described in
The MLI module is mapped to the low priority On Chip Bus requests of the DMA Module,
while the mapping of the Cerberus and the Move Engines to the On Chip Bus requests
is selected by software (control register bits).
The complete list of FPI master priorities can be found in the FPI Bus Control Unit
Chapter.
The complete list of LMB master priorities can be found in the Local Memory Bus
Controller Unit Chapter.
Table 11-3 DMA Module Priorities on On Chip Busses
On Chip DMA On Chip Bus Request Comment
Bus Priority
High Cerberus High
Move Engine m:
CHCRmx.DMAPRIO = "11"
Medium Move Engine m:
CHCRmx.DMAPRIO = "01"
Low Move Engine m:
CHCRmx.DMAPRIO = "00"
MLI0
Cerberus Low
11.2.8

DMA Module: On Chip Bus Access Rights, RMW support

All accesses triggered by the DMA Move Engines, the MLI module or the Cerberus
module are always done in SV mode.
The DMA module does not support read/modify write instructions to the peripherals
connected to the DMA Peripheral Interface (the MLI, Memory Checker and Cerberus
modules).
11.2.9

DMA Module On Chip Bus Master Interfaces

This chapter describes the features of the DMA On Chip Bus Master Interfaces to the
FPI Bus and to the LMB Bus.
User's Manual
DMA, V1.0
Direct Memory Access Controller (DMA)
Priority selection by SW in Cerberus.
Priority selection by SW in Move Engine.
(x=7-0) (m=1-0)
Priority selection by SW in Move Engine.
(x=7-0) (m=1-0)
Priority selection by SW in Move Engine.
(x=7-0) (m=1-0)
-
Priority selection by SW in Cerberus.
11-25
TC1728
Table 11-3.
2011-12