Infineon Technologies TC1728 User Manual page 1267

The Emergency Stop Register ESR determines which bits of SRL and SRH are enabled
for emergency operation.
ESR
Emergency Stop Register
31 30 29 28
ENH ENH ENH ENH
15 14 13 12
rw rw rw rw
15 14 13 12
ENL ENL ENL ENL
15 14 13 12
rw rw rw rw
Field Bits
ENLx x
(x = 0-15)
ENHx x+16
(x = 0-15)
User's Manual
MSC, V1.37 2009-05
27 26 25 24
ENH ENH ENH ENH
11 10 9 8
rw rw rw rw
11 10 9 8
ENL ENL ENL ENL
11 10 9 8
rw rw rw rw
Type Description
rw Emergency Stop Enable for Bit x in SRL
This bit enables the emergency stop feature
selectively for each SRL bit. If the emergency stop
condition is met and enabled (ENLx = 1), the SRL[x]
bit is of the data register DD.DDL[x] is used for the
shift register load operation.
0 Emergency stop feature for bit SRL[x] is
B
disabled.
1 The emergency stop feature for bit SRL[x] is
B
enabled.
rw Emergency Stop Enable for Bit x in SRH
This bit enables the emergency stop feature
selectively for each SRH bit. If the emergency stop
condition is met and enabled (ENHx = 1), the SRH[x]
bit of the data register DD.DDH[x] is used for the shift
register load operation.
0 Emergency stop feature for bit SRH[x] is
B
disabled.
1 The emergency stop feature for bit SRH[x] is
B
enabled.
Micro Second Channel (MSC)
(2C )
H
23 22 21
ENH ENH ENH
7 6 5
rw rw rw
7 6 5
ENL ENL ENL
7 6 5
rw rw rw
19-48
TC1728
Reset Value: 0000 0000
20 19 18 17
ENH ENH ENH ENH
4 3 2 1
rw rw rw rw
4 3 2 1
ENL ENL ENL ENL
4 3 2 1
rw rw rw rw
V1.0, 2011-12
H
16
ENH
0
rw
0
ENL
0
rw