Infineon Technologies TC1728 User Manual page 1230

32-bit single-chip microcontroller
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TC1728
Micro Second Channel (MSC)
t
The following formula determines the number of
cycles of a data frame: All
FCL
parameters (bits and bit fields) are located in register DSC.
Number of cycles = ENSELL + NDBL + ENSELH + NDBH + PPD
(19.1)
Note that in the formula above, PPD must be set to 2 when DSC.PPD ≤ 00010
.
B
Passive Time Frames
A passive time frame has the length defined by the five data frame parameters according
Equation
(19.1). They are generated only in Data Repetition Mode. Under special
conditions (command frame insertion), passive time frames can be shortened (see
Figure
19-9).
During passive time frames, the data output SO have to be considered as invalid at the
receiving device and the clock output FCL may toggle or not (as selected by bit
OCR.CLKCTRL). The ENL and ENH enable signals remain at low level during a passive
time frame.
User's Manual
19-11
V1.0, 2011-12
MSC, V1.37 2009-05

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