18
Synchronous Serial Interface (SSC)
This chapter describes the four SSC Synchronous Serial Interfaces SSC0, SSC1, SSC2
and SSC3 of the TC1728. It contains the following sections:
•
Functional description of the SSC kernel, valid for SSC0, SSC1, SSC2 and SSC3
(see
Page
18-1).
•
SSC kernel register description, describes all SSC kernel specific registers
(see
Page
18-27).
•
TC1728 implementation-specific details and registers of the SSC0/SSC1/SSC2
modules (port connections and control, interrupt control, address decoding, clock
control, see
Page
Note: The SSC kernel register names described in
TC1728 User's Manual by the module name prefix "SSC0_" for the SSC0
interface, by "SSC1_" for the SSC1 interface, and by "SSC2_" for the SSC2
interface.
18.1
SSC Kernel Description
Figure 18-1
shows a global view of the SSC interface.
f
SSC
Clock
f
Control
CLC
Address
Decoder
RIR
TIR
Interrupt
Control
EIR
DMA Requests
Figure 18-1 General Block Diagram of the SSC Interface
User's Manual
SSC, V1.41 2010-06
18-43).
Master
Slave
SSC
Slave
Module
(Kernel)
Master
Slave
Master
Synchronous Serial Interface (SSC)
Section 18.2
MRSTA
MRSTB
MTSR
MTSRA
MTSRB
MRST
SCLKA
SCLKB
Control
SCLK
SLSI[7:1]
SLSO[7:0]
SLSOANDO[7:0]
SLSOANDI[7:0]
Enable
M/S Select
18-1
TC1728
are referenced in the
MTSR
MRST
Port
SCLK
SLSI[7:1]
SLSO[7:0]
SLSOANDO[7:0]
MCB06058_mod
V1.0, 2011-12