Transmission Modes - Infineon Technologies TC1728 User Manual

32-bit single-chip microcontroller
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19.1.2.3 Transmission Modes

The downstream channel of the MSC makes it possible to select between two
transmission modes:
Triggered Mode, selected by DSC.TM = 0, or
Data Repetition Mode, selected by DSC.TM = 1
Triggered Mode
In Triggered Mode, command frames or data frames are sent out as a result of a
software event. When a frame transmission has been finished and no further frame
transmission has been requested, the downstream channel returns to idle state and
waits for the next frame transmission to be triggered by software.
When the Downstream Command Register DC is written, the command pending bit
DSC.CP becomes set and a command frame will be immediately started and sent out if
the downstream channel is idle. If a data or command frame is currently processed and
output, the command frame transmission is delayed, and started when the active
downstream frame has been finished. The command pending bit DSC.CP becomes
cleared by hardware when the first bit of the command frame is sent out.
If the downstream channel is idle and the data pending bit DSC.DP is set by writing bit
ISC.SDP with 1, a data frame will be immediately started and sent out if the downstream
channel is idle. If a data frame or a command frame is currently processed and output,
the data frame transmission is delayed and started when the active downstream frame
has been finished. The data pending bit DSC.DP becomes cleared by hardware when
the first bit of the data frame is sent out.
A command frame always has priority over the data frame. This means that if both frame
pending bits are set (DSC.DP = DSC.CP = 1), the command frame will always be sent
first. Therefore, a pending data frame transmission will be delayed as long as no further
command frame transmission is running or requested.
Figure 19-8
is a flow diagram of the Triggered Mode. This diagram especially shows the
behavior of the data and command pending bits DSC.DP and DSC.CP. If both frame
pending bits are set (DSC.DP = DSC.CP = 1), the command frame will always be sent
first, followed by the data frame (assuming no further command frame has been
requested).
The type of the active frame that is currently processed and output is indicated by two
status flags: DSS.DFA is set during a data frame transmission and DSS.CFA is set
during a command frame transmission. Further, the downstream counter DSS.DC
indicates the number of shift clock periods that have been elapsed since the start of the
current frame.
In Triggered Mode, the shift register loading event as described in
occurs just before a command or data frame transmission is started.
User's Manual
MSC, V1.37 2009-05
Micro Second Channel (MSC)
19-14
TC1728
Section 19.1.2.2
V1.0, 2011-12

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