Baud Rates In Asynchronous Mode - Infineon Technologies TC1728 User Manual

17.1.5.1 Baud Rates in Asynchronous Mode

For asynchronous operation, the baud rate generator provides a clock
times the rate of the established baud rate. Every received bit is sampled on the 7
th
and 9 cycle of this clock. The clock divider circuitry, which generates the input clock
for the 13-bit baud rate timer, is extended by a fractional divider circuitry that allows the
adjustment of more accurate baud rates and the extension of the baud rate range.
The baud rate of the baud rate generator depends on the settings of the following bits
and register values:
• Input clock f
ASC
• Selection of the baud rate timer input clock
• If bit CON.FDE = 1 (fractional divider): value of register FDV
• Value of the 13-bit reload register BG
The output clock of the baud rate timer with the reload register is the sample clock in the
asynchronous operating modes of the ASC. For baud rate calculations, this baud rate
f
clock is derived from the sample clock
BR
f
ASC
R
Figure 17-8 ASC Baud Rate Generator Circuitry in Asynchronous Modes
User's Manual
ASC, V1.3 2007-11
Asynchronous/Synchronous Serial Interface (ASC)
FDE
Fractional
Divider
2
MUX
3
BRS
f by bits CON.FDE and CON.BRS
DIV
f
by a division of sixteen.
BRT
13-bit Reload Register
f
DIV
13-bit Baud Rate Timer
FDE
0
0
1
17-13
TC1728
f
with sixteen
BRT
f
Baud
BR
16 Rate
Clock
Sample
Clock
f
BRT
BRS Selected Divider
2
0
3
1
X Fractional Divider
MCA06207
V1.0, 2011-12
th th
, 8
f
DIV