Transmit Fifo - Infineon Technologies TC1728 User Manual

32-bit single-chip microcontroller
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20.3.11.6 Transmit FIFO

The Transmit FIFO structure is used to buffer a series of Data or Remote Frames that
must be transmitted. A transmit FIFO consists of one base message object and one or
more slave message objects.
A Transmit FIFO is selected by setting MOFCRn.MMC = 0010
Unlike the Receive FIFO, slave objects assigned to the Transmit FIFO must explicitly set
their bit fields MOFCRn.MMC = 0011
back to the Transmit FIFO Base Object (to be initialized by software).
The MOSTATn.TXEN1 bits (Transmit Enable 1) of all message objects except the one
which is selected by the CUR pointer of the base object must be cleared by software.
TXEN1 of the message (slave) object selected by CUR must be set. CUR (of the base
object) may be initialized to any FIFO slave object.
When tagging the message objects of the FIFO as valid to start the operation of the
FIFO, then the base object must be tagged valid (MSGVAL = 1) first.
Before a Transmit FIFO becomes de-installed during operation, its slave objects must
be tagged invalid (MSGVAL = 0).
The Transmit FIFO uses the TXEN1 bit in the Message Object Control Register of all
FIFO elements to select the actual message for transmission. Transmit acceptance
filtering evaluates TXEN1 for each message object and a message object can win
transmit acceptance filtering only if its TXEN1 bit is set. When a FIFO object has
transmitted a message, the hardware clears its TXEN1 bit in addition to standard
transmit postprocessing (clear TXRQ, transmit interrupt etc.), and moves the CUR
pointer in the next FIFO base object to be transmitted. TXEN1 is set automatically (by
hardware) in the next message object. Thus, TXEN1 moves along the Transmit FIFO
structure as a token that selects the active element.
If bit field MOFCRn.OVIE ("Overflow Interrupt Enable") of the FIFO base object is set and
the current pointer CUR becomes equal to MOFGPRn.SEL, a FIFO overflow interrupt
request is generated. The interrupt request is generated on interrupt node RXINP of the
base object after postprocessing of the received frame. Receive interrupts are still
generated for the Transmit FIFO base object if bit RXIE is set.
User's Manual
MultiCAN, V2.24
Controller Area Network Controller (MultiCAN)
. The CUR pointer in all slave objects must point
B
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TC1728
in the FIFO base object.
B
V1.0, 2011-12

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