Msc Kernel Description; Overview - Infineon Technologies TC1728 User Manual

19.1

MSC Kernel Description

This section describes the functionality of the MSC kernel.
19.1.1

Overview

The MSC interface provides a serial communication link typically used to connect power
switches or other peripheral devices. The serial communication link includes a fast
synchronous downstream channel and a slow asynchronous upstream channel.
Figure 19-2 shows a global view of the MSC interface signals.
Clock
Control
Address
Decoder
Interrupt
Control
To DMA
ALTINL[15:0]
ALTINH[15:0]
EMGSTOPMSC
Figure 19-2 General Block Diagram of the MSC Interface
The downstream and upstream channels of the MSC module communicate with the
external world via nine I/O lines. Eight output lines are required for the serial
communication of the downstream channel (clock, data, and enable signals). One out of
eight input lines SDI[7:0] is used as serial data input signal for the upstream channel. The
source of the serial data to be transmitted by the downstream channel can be MSC
register contents or data that is provided at the ALTINL/ALTINH input lines. These input
lines are typically connected to other on-chip peripheral units (for example with a timer
unit like the GPTA). An emergency stop input signal makes it possible to set bits of the
serial data stream to dedicated values in emergency case.
User's Manual
MSC, V1.37 2009-05
f
MSC
f
CLC
MSC
SR[3:0]
Module
4
(Kernel)
16
16
19-3
Micro Second Channel (MSC)
FCLP
FCLN
SOP
SON
EN0
EN1
EN2
EN3
8
SDI[7:0]
MCB06059
TC1728
V1.0, 2011-12