Infineon Technologies TC1728 User Manual page 1093

Field Bits
SETR 15
0 [9:8], 11,
[31:16]
1) The bit field SRR is automatically cleared by hardware at the end of an interrupt arbitration round if the node
was the winner, therefore this information is not suitable for interrupt plausibility checks.
User's Manual
BMU, V2.6
Type Description
w Request Set Bit
SETR is required to set SRR.
0 No action
B
1 Set SRR; bit value is not stored; read always
B
returns 0; no action if CLRR is set also.
r Reserved
Read as 0; should be written with 0.
15-49
TC1728
Bus Monitor Unit (BMU)
V1.0, 2011-12