Infineon Technologies TC1728 User Manual page 1126

Using the Fixed Input Clock Divider
The baud rate for asynchronous operation of the serial channel ASC when using the
fixed input clock divider ratios (CON.FDE = 0) and the required BG reload value for a
given baud rate can be determined by the following formulas:
Table 17-1 Asynchronous Baud Rate Formulas using the Fixed Input Clock
Dividers
FDE BRS
0 0
1
BG represents the content of the reload register bit field BG.BR_VALUE, taken as an
unsigned 13-bit integer.
The maximum baud rate that can be achieved for the asynchronous operating modes
when using the two fixed clock dividers and a module clock of 110 MHz is 3.4375 Mbit/s.
Table 17-2 lists various commonly used baud rates together with the required reload
values and the deviation errors compared to the intended baud rate.
User's Manual
ASC, V1.3 2007-11
Asynchronous/Synchronous Serial Interface (ASC)
BG Formula
0 ... 8191
17-14
Baud rate = ----------------------------------- -
×
32
BG = -------------------------------------- - 1
×
32 Baud rate
Baud rate = ------------------------------------ -
×
48
BG = -------------------------------------- - 1
×
48
TC1728
f
ASC
( )
BG + 1
f
ASC
–
f
ASC
( )
BG + 1
f
ASC
–
Baud rate
V1.0, 2011-12