Interrupt Control Registers - Infineon Technologies TC1728 User Manual

17.3.2.4 Interrupt Control Registers

The eight interrupts of the ASC0 and ASC1 modules are controlled by the following
service request control registers:
• ASC0_TSRC, ASC1_TSRC: control the transmit interrupts
• ASC0_RSRC, ASC1_RSRC: control the receive interrupts
• ASC0_ESRC, ASC1_ESRC: control the error interrupts
• ASC0_TBSRC, ASC1_TBSRC: control the transmit buffer empty interrupts
TSRC
Transmit Interrupt Service Request Control Register
RSRC
Receive Interrupt Service Request Control Register
ESRC
Error Interrupt Service Request Control Register
TBSRC
Transmit Buffer Interrupt Service Request Control Register
31 30 29 28
15 14 13 12
SET CLR
SRR SRE
R R
w w rh rw
Field Bits
SRPN [7:0]
TOS 10
SRE 12
SRR 13
CLRR 14
SETR 15
User's Manual
ASC, V1.3 2007-11
Asynchronous/Synchronous Serial Interface (ASC)
(F0
(F4
(F8
(FC
27 26 25 24
11 10 9 8
0 TOS 0
r rw r
Type Description
rw Service Request Priority Number
rw Type of Service Control
rw Service Request Enable
rh Service Request Flag
w Request Clear Bit
w Request Set Bit
17-41
) Reset Value: 0000 0000
H
) Reset Value: 0000 0000
H
) Reset Value: 0000 0000
H
) Reset Value: 0000 0000
H
23 22 21
0
r
7 6 5
TC1728
20 19 18 17
4 3 2 1
SRPN
rw
V1.0, 2011-12
H
H
H
H
16
0