Infineon Technologies TC1728 User Manual page 1071

32-bit single-chip microcontroller
Table of Contents

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Table 15-6
Registers Overview
Short Name Description
System Registers
CLC
Clock Control Register 00
ID
Module Identifier
Global Control over Read access to Bus Transaction Table
CTL
Transaction Filtering
Control Register
PTR
BTF running pointers
FULLNESS Fifo Fullness
Bus Logging Configuration Registers
PSET0
Peripheral Set 0
PSET1
Peripheral Set 1
TID
Transaction ID Set 0
Fifo Monitoring Configuration and Status Registers
FMCTL
Control Register
FMSTS
Status Register
FMTH
High Threshold Value
Control of ECC operation
SMACON
Control of SIST Mode
MIECON
ECC modes control
MIECON2
ECC modes control
Interrupt System Registers
SRC
Service Request
Control
Access Mode Rules
The
Table 15-6 "Registers Overview" on Page 15-27
conventions.
E indicates that an access is only possible if the end of initialization signal from the
System Control Unit is active. In this case Supervisor Mode (SV) is also mandatory.
When U, SV are both listed it means that a read or write access can be done either
in user mode (U) or supervisor mode (V).
User's Manual
BMU, V2.6
Offset
Access Mode Reset
Addr
Read
Write
U, SV SV, E
H
08
U, SV BE
H
20
U, SV SV, E
H
24
U, SV BE
H
28
U, SV BE
H
30
U, SV SV, E
H
34
U, SV SV, E
H
38
U, SV SV, E
H
40
U, SV SV, E
H
44
U, SV U,SV
H
48
U, SV SV, E
H
50
U, SV SV,E
H
54
U, SV SV,E
H
58
U, SV SV,E
H
FC
U, SV SV
H
uses the standard access mode
15-27
TC1728
Bus Monitor Unit (BMU)
Description
Class
See
3
Page 15-29
3
Page 15-31
3
Page 15-32
3
Page 15-33
3
Page 15-34
3
Page 15-35
3
Page 15-38
3
Page 15-41
3
Page 15-42
3
Page 15-42
3
Page 15-43
3
Page 15-45
3
Page 15-46
3
Page 15-46
3
Page 15-48
V1.0, 2011-12

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