Usage In Non Safety Applications - Infineon Technologies TC1728 User Manual

15.4.8

Usage in non safety applications

When the BMU is not used in a safety application the BTF fifo can be accessed as a
standard linear memory through the BMU slave interface using BTR2, BTR4 or BTR8
FPI transactions. This mode of operation is controlled by the CTL.MODE field. Single
word or sub word (8/16-bit) accesses are not allowed; such requests will result in a Bus
Error. The start address of the FPI burst transactions is aligned with the size of the
burst.
Table 15-3 SRAM address map
Module
Bus Monitoring Unit F032 4000
Figure 15-12 "Mapping between FPI Burst transaction and SRAM contents" on
Page 15-20 shows how the FPI bus 32-bit data phases are mapped into the 64-bit word
of the BMU SRAM. An example with read and write bursts is given.
FPI Addr
FPI WR
Data
63
...
Y[31:0]
...
...
B[31:0]
D[31:0]
...
FPI
@ 2
Addr
FPI RD
Data
Figure 15-12 Mapping between FPI Burst transaction and SRAM contents
User's Manual
BMU, V2.6
Base address
H
FPI Write Burst (e.g. BTR2)
@1 @1 + 0x4
X[31:0] Y[31:0]
32 31
...
X[31:0]
...
...
A[31:0]
C[31:0]
...
FPI Read Burst (e.g. BTR4)
@2 + 0x4 @2 + 0x8
A[31:0] B[31:0]
End address
F032 4FFF
H
0
Offset @1
Offset @2
Offset @2 + 8
@2 + 0xC
C[31:0] D[31:0]
15-20
TC1728
Bus Monitor Unit (BMU)
Note
BMURAM
V1.0, 2011-12