Read Operation And Fifo Structure - Infineon Technologies TC1728 User Manual

15.4.5

Read Operation and Fifo Structure

0
1
2
3
4
5
6
wptr N-2
N-1
Figure 15-8 BTF Cyclic Buffer Read Pointer Management
The read pointer (rptr in
on the FPI transaction size given by the FPI_OPC[3:0] opcode the read pointer is
incremented accordingly. A BTR2 read burst will increment the read pointer by 2 and
so on. The FPI_A[31:0] address information is not used to directly access an entry in the
BTF. The FPI_A[31:0] shall point to the base address of the BTF SRAM, otherwise a Bus
Error will be returned with the first read data terminating the FPI burst.
Having the read pointer controlled by hardware enables to free the fifo space in a faster
way, increasing the logging performance.
User's Manual
BMU, V2.6
Write Pointer Wrap around at FIFO boundary
after a BTR4 write burst
rptr
Read Pointer
After a BTR2
Read
Transaction
to BTF
rptr wptr
Read Pointer
After a BTR4
Read
Transaction
to BTF
rptr
Read Pointer
After several
Read
Transaction
to BTF
leading to an
EMPTY state
rptr
Read Pointer Wrap around at FIFO boundary
after a BTR 2 read burst
Figure 15-7) is also only controlled by hardware. Depending
15-15
Bus Monitor Unit (BMU)
0 rptr
1
N-2
N-1
TC1728
V1.0, 2011-12