Address Map - Infineon Technologies TC1728 User Manual

17.3.4

Address Map

An absolute register address is given by the offset address of the register (given in
Table 17-7) plus the module base address (given in
Table 17-10 Address Map of ASC0/ASC1
Short Name Description
Async./Sync. Serial Interface 0 (ASC0)
ASC0_ ASC0 Clock Control
CLC Register
ASC0_ ASC0 Peripheral Input
PISEL Select Register
ASC0_ ASC0 Module
ID Identification Register
– Reserved
ASC0_ ASC0 Control Register
CON
ASC0_ ASC0 Baud Rate/Timer
BG Reload Register
ASC0_ ASC0 Fractional Divider
FDV Register
– Reserved
ASC0_ ASC0 Transmit Buffer
TBUF Register
ASC0_ ASC0 Receive Buffer
RBUF Register
– Reserved
ASC0_ ASC0 Write Hardware Bits
WHBCON Control Register
– Reserved
ASC0_ ASC0 Transmit Interrupt
TSRC Service Req. Control Reg.
ASC0_ ASC0 Receive Interrupt
RSRC Service Req. Control Reg.
User's Manual
ASC, V1.3 2007-11
Asynchronous/Synchronous Serial Interface (ASC)
Address
F000 0A00
F000 0A04
F000 0A08
F000 0A0C
F000 0A10
F000 0A14
F000 0A18
F000 0A1C
F000 0A20
F000 0A24
F000 0A28
F000 0A4C
F000 0A50
F000 0A54
F000 0AEC
F000 0AF0
F000 0AF4
17-43
Table 17-6).
Access Mode Reset Value
Read Write
U, SV SV, E 0000 0003
H
U, SV U, SV 0000 0000
H
U, SV BE
H
BE BE
H
U, SV U, SV 0000 0000
H
U, SV U, SV 0000 0000
H
U, SV U, SV 0000 0000
H
BE BE
H
U, SV U, SV 0000 0000
H
U, SV U, SV 0000 0000
H
- BE BE
H
H
U, SV U, SV 0000 0000
H
- BE BE
H
H
U, SV U, SV 0000 0000
H
U, SV U, SV 0000 0000
H
TC1728
H
H
0000 44XX
H
–
H
H
H
–
H
H
–
H
–
H
H
V1.0, 2011-12