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•
Error Handling Unit
The Error Handling Unit manages the receive and transmit error counter. Depending
on the contents of both counters, the CAN node is set into an error-active, error
passive or bus-off state.
•
Node Control Unit
The Node Control Unit coordinates the operation of the CAN node:
– Enable/disable CAN transfer of the node
– Enable/disable and generate node-specific events that lead to an interrupt request
(CAN bus errors, successful frame transfers etc.)
– Administration of the Frame Counter
•
Interrupt Control Unit
The Interrupt Control Unit in the CAN node controls the interrupt generation for the
different conditions that can occur in the CAN node.
Message Controller
The Message Controller handles the exchange of CAN frames between the CAN nodes
and the message objects that are stored in the Message RAM. The Message Controller
performs several functions:
•
Receive acceptance filtering to determine the correct message object for storing of a
received CAN frame
•
Transmit acceptance filtering to determine the message object to be transmitted first,
individually for each CAN node
•
Transfer contents between message objects and the CAN nodes, taking into account
the status/control bits of the message objects
•
Handling of the FIFO buffering and gateway functionality
•
Aggregation of message-pending notification bits
List Controller
The List Controller performs all operations that lead to a modification of the double-
chained message object lists. Only the list controller is allowed to modify the list
structure. The allocation/deallocation or reallocation of a message object can be
requested via a user command interface (command panel). The list controller state
machine then performs the requested command autonomously.
Interrupt Control
The general interrupt structure is shown in
the interrupt generation. The interrupt pulse is generated independently of the interrupt
flag in the interrupt status register. The interrupt flag can be reset by software by writing
a 0 to it.
If enabled by the related interrupt enable bit in the interrupt enable register, an interrupt
pulse can be generated at one of the 16 interrupt output lines INT_Om of the MultiCAN
User's Manual
MultiCAN, V2.24
Controller Area Network Controller (MultiCAN)
Figure
20-8. The interrupt event can trigger
20-15
TC1728
V1.0, 2011-12
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