Interfaces Of The Bmu Module - Infineon Technologies TC1728 User Manual

15.5

Interfaces of the BMU Module

This section only describes the signals that do not belong to the system-on-chip standard
interfaces (Interrupt Bus, FPI Bus).
Table 15-5 Generic BMU Digital Connections
Signal
EINIT
FPI_CLK_EN
OCDS_P_SUSPEND
SLEEP_N
SECWEN
BMU_ECC_ERROR
BMU_SPB_SEL[63:0]
BMU_SPB_ACK[1:0]
1) The postfix indicating the direction of the signal is not part of the signal name specification as it depends on
the naming conventions used by the development flow. The I/O column indicated the direction of the signal.
When the signal is specific to the BMU module it gets "BMU_" as prefix.
Notes
• FPI_CLK_EN is the FPI clock signal.
• OCDS_P_SUSPEND: the suspend feature is not supported by BMU. The
OCDS_P_SUSPEND signal is not used.
• SLEEP_N is used to control the sleep mode. The sleep mode function is not
supported by BMU, the SLEEP_N signal is not used.
• The FPI_ACK[1:0] signals from the FPI bus are ored together and sent to all masters
(only the granted master interprets the FPI_ACK[1:0] contents). The BMU will see the
global FPI_ACK[1:0] signal and not directly the individual FPI_ACK corresponding to
a FPI region.
• The width of the BMU_SPB_SEL signal is set to 64 bits to make it independent from
the peripheral configuration. The non-used upper bits of BMU_SPB_SEL must be set
to the logic value LOW. The order of the select lines is given by
"Identification of FPI Regions" on Page
User's Manual
BMU, V2.6
from/to
Module
SCU (System Control Unit)
SCU (System Control Unit)
On Chip Debug
SCU (System Control Unit)
SCU (System Control Unit)
Connects to SCU PRDCFG2.SENAV
Single Error Correction Availability Control
SCU (System Control Unit)
un-correctable ECC error detected output
System Peripheral Bus (SPB) Address
Decoders
Global FPI_ACK[1:0] generated by the
FPI bus
15-24
Bus Monitor Unit (BMU)
1)
15-22.
TC1728
I/O to Reset
BMU Value
I
I
I
I
I
O 0
I
I
Table 15-4
V1.0, 2011-12