Infineon Technologies TC1728 User Manual page 1077

will not be able to use the logging capability of the BMU. If the BMU is intended to be
used in SRAM mode only, it is not allowed to switch during run-time to FIFO mode.
In the FPI bus protocol the initiator (also called the master) is uniquely identified by the
FPI Transaction Identifier made of 4-bits. When the MODE field and TMF field are both
set to 1, the BMU monitors the master identifier of every FPI write transaction. When the
master identifier matches with the value(s) present in the
information of every address phase of the transaction is logged into the BMU FIFO. The
logging based on the master identifier monitoring has precedence over the logging
based on the FPI region monitoring
PTR
Pointer Information for Bus Transaction Fifo
31
0
r
Field Bits
RPTR [9:0]
WPTR [25:16] rh
0 [15:10],
[31:26]
PTR is to be used for debug or verification purposes.
User's Manual
BMU, V2.6
(24
WPTR
rh
Type Description
rh Read Pointer for a 1024 entry SRAM
Indicates the current position of the read pointer. A write
to this field has no hardware effect. For debug purposes
only.
Write Pointer for a 1024 entry SRAM
Indicates the current position of the write pointer. A write
to this field has no hardware effect. For debug purposes
only.
r reserved bit fields. A write has no effect. Returns 0s
on read.
15-33
Bus Monitor Unit (BMU)
TID
) Reset Value: 0000 0000
H
0
r
TC1728
register, the address
RPTR
rh
V1.0, 2011-12
H
0