Infineon Technologies TC1728 User Manual page 1057

32-bit single-chip microcontroller
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BTF[0][DataPhase ]
BTF[1][DataPhase 1]
BTF[2][DataPhase 2]
BTF[3][DataPhase 3]
BTF[4][DataPhase 4]
BTF[5][DataPhase 5]
BTF[6][DataPhase 6]
BTF[7][DataPhase 7]
BTF[8][DataPhase 8]
BTF[9][DataPhase ]
BTF[10][DataPhase 1]
BTF[11][DataPhase 2]
BTF[12][DataPhase 1]
BTF[13][DataPhase 2]
BTF[14][DataPhase 3]
BTF[15][DataPhase 4]
...
...
Figure 15-6 Logging information for FPI burst transactions
User's Manual
BMU, V2.6
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31
BTF[0][Control] {FPI_A[27:2]}
BTF[1][Control] {FPI_A[27:2]}
BTF[2][Control] {FPI_A[27:2] + 0x1}
BTF[3][Control] {FPI_A[27:2] + 0x2}
BTF[4][Control] {FPI_A[27:2] + 0x3}
BTF[5][Control] {FPI_A[27:2] + 0x4}
BTF[6][Control] {FPI_A[27:2] + 0x5}
BTF[7][Control] {FPI_A[27:2] + 0x6}
BTF[8][Control] {FPI_A[27:2] + 0x7}
BTF[9][Control] {FPI_A[27:2]}
BTF[10][Control] { FPI_A[27:2]}
BTF[11][Control] { FPI_A[27:2] + 0x1}
BTF[12][Control] { FPI_A[27:2]}
BTF[13][Control] { FPI_A[27:2] + 0x1}
BTF[14][Control] { FPI_A[27:2] + 0x2}
BTF[15][Control] { FPI_A[27:2] + 0x3}
...
...
15-13
Bus Monitor Unit (BMU)
0
Transaction 0 : SDTW
Transaction 1: BTR8
Transaction 2: SDTW
Transaction 3: BTR2
Transaction 4: BTR4
Note: FPI protocol
provides address for
each data phase
TC1728
V1.0, 2011-12

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