Address Map Of The Ssc Modules - Infineon Technologies TC1728 User Manual

18.3.5

Address Map of the SSC Modules

An absolute register address is given by the offset address of the register (given in
Table 18-4) plus the module base address (given in
Table 18-7 Address Map of SSC0/SSC1/SSC2/SSC3
Short Name Description
Synchronous Serial Interface 0 (SSC0)
SSC0_ SSC0 Clock Control
CLC Register
SSC0_ SSC0 Port Input Select
PISEL Register
SSC0_ SSC0 Module
ID Identification Register
SSC0_ SSC0 Fractional Divider
FDR Register
SSC0_CON SSC0 Control Register
SSC0_ SSC0 Baud Rate Timer
BR Reload Register
SSC0_ SSC0 Slave Select Output
SSOC Control Register
SSC0_ SSC0 Slave Select Output
SSOTC Timing Control Register
SSC0_ SSC0 Transmit Buffer
TB Register
SSC0_ SSC0 Receive Buffer
RB Register
SSC0_ SSC0 Status Register
STAT
SSC0_ SSC0 Error Flag
EFM Modification Register
– Reserved
SSC0_ SSC0 Transmit Interrupt
TSRC Service Req. Control Reg.
User's Manual
SSC, V1.41 2010-06
Synchronous Serial Interface (SSC)
Table 18-3).
Address Access Mode Reset Value
Read
F010 0100 U, SV SV, E 0000 0003
H
F010 0104 U, SV U, SV 0000 0000
H
F010 0108 U, SV BE
H
F010 010C U, SV SV, E 1000 0000
H
F010 0110 U, SV U, SV 0000 0000
H
F010 0114 U, SV U, SV 0000 0000
H
F010 0118 U, SV U, SV 0000 0000
H
F010 011C U, SV U, SV 0000 0000
H
F010 0120 U, SV U, SV 0000 0000
H
F010 0124 U, SV U, SV 0000 0000
H
F010 0128 U, SV U, SV 0000 0000
H
F010 012C U, SV U, SV 0000 0000
H
F010 0130 - BE
H
F010 01F0
H
F010 01F4 U, SV SV
H
18-59
TC1728
Write
0000 45XX
BE –
0000 0000
V1.0, 2011-12
H
H
H
H
H
H
H
H
H
H
H
H
H