Infineon Technologies TC1728 User Manual page 1259

Field Bits
PCTR 4
UC [20:16] rh
0 [15:5],
[31:21]
User's Manual
MSC, V1.37 2009-05
Type Description
rw Parity Control
This bit determines the parity mode used by the
upstream channel for data reception.
0 Even parity mode is selected. A parity bit is set
B
on an odd number of 1s in the serial
address/data stream.
1 Odd parity mode is selected. A parity bit is set
B
on an even number of 1s in the serial
address/data stream.
Upstream Counter
This bit field indicates the content of the upstream
counter that counts the bits during upstream channel
reception.
r Reserved
Read as 0; should be written with 0.
19-40
Micro Second Channel (MSC)
TC1728
V1.0, 2011-12