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7.1.3.3
Flash Rampup
The Flash Rampup is automatically started after every reset by hardware (refer to PMU
Chapter, Program and Data Flash). Therefore the SSW does not initiate the Rampup but
only observes the flags in Flash SFRs and reacts accordingly.
The Flash Rampup is further handled by the SSW. Basically the Flash "Busy" status is
checked as the section below describes.
If after the time-out the Flash is still "Busy", then:
•
"Flash Rampup" error-code is created
•
the Flash is put into sleep mode
•
a jump to the SSW Error-processing routine is performed
Flash Rampup
Flash "Busy" status is continuously checked but no longer than for a defined time-out.
Once all of the Flash Array Banks are "Ready" (PBUSY=0), the startup procedure
continues immediately. As far as the Rampup duration varies from device to device and
upon operational conditions, the overall startup time respectively will be slightly different.
7.1.3.4
Basic Device Settings
The target of this functional module is to initialize several TC1728-registers with the
values, which will be first seen by the user - or generally available - after exiting the SSW.
Following device resources are initialized here:
•
JTAG Device Identification register (JTAGID.JTAG_ID)
•
Unique Chip ID - it is written by the SSW at the beginning of LDRAM - 4 Words
starting at D000'0000
7.1.3.5
RAMs Handling
No RAM initialization is performed by the Startup Software in TC1728.
Attention: In regard to TC1728 RAMs after startup the user must consider:
•
if ECC will be enabled for a RAM module - correct initial content of this memory must
be assured
•
upon the application software start, the error detection is disabled in all memories
Note: MultiCAN memory is an exception from the above rule and error-detection is
enabled for it, but due to the special access-mechanism implemented (no direct
read/write by the user software) initialization is not needed there.
User's Manual
BOOT_TC1728_TS, V1.1
.
H
7-5
TC1728
BootROM Content
V1.0, 2011-12
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