Control Registers - Infineon Technologies TC1728 User Manual

Table 17-7 Registers Overview - ASC Kernel Registers (cont'd)
Register Register Long Name
Short Name
RBUF Receive Buffer Register
WHBCON Write Hardware Bits Control Register
1) The absolute register address is calculated as follows:
Module Base Address
17.2.1

Control Registers

The ASC module kernel provides two receive input lines, RXD_I0 and RXD_I1. Bit RIS
in the Peripheral Input Select Register PISEL determines which of theses two input lines
is taken for RXD receive input purposes.
PISEL
Peripheral Input Select Register
31
Field Bits
RIS 0
0 [31:1] r
Note: Implementation specific details (RIS functionality) see
Register" on Page
User's Manual
ASC, V1.3 2007-11
Asynchronous/Synchronous Serial Interface (ASC)
((Table 17-6 on Page 17-21) + Offset Address (shown in this column)
Type Description
rw Receive Input Select
0 ASC receiver input RXD_I0 selected
B
1 ASC receiver input RXD_I1 selected
B
Reserved
Read as 0; should be written with 0.
17-37.
Offset
Address
0024
0050
(04 )
H
0
r
17-22
TC1728
Description
1)
see
Page 17-31
H
Page 17-27
H
Reset Value: 0000 0000
"Peripheral Input Select
V1.0, 2011-12
H
0
RI
S
rw