Infineon Technologies TC1728 User Manual page 1265

The bit fields of the Downstream Select Data Low Register DSDSL determine the data
source for each bit in shift register SRL.
DSDSL
Downstream Select Data Source Low Register
31 30 29 28
SL15 SL14
rw rw
15 14 13 12
SL7 SL6
rw rw
Field Bits
SLx [2*x+1:
(x = 0-15) 2*x]
User's Manual
MSC, V1.37 2009-05
(24
27 26 25 24
SL13 SL12
rw rw
11 10 9 8
SL5 SL4
rw rw
Type Description
rw Select Source for SRL
SLx determines which data source is used for the shift
register bit SRL[x] during data frame transmission.
00 SRL[x] is taken from data register DD.DDL[x].
B
01 Reserved.
B
10 SRL[x] is taken from the ALTINL input line x.
B
11 SRL[x] is taken from the ALTINL input line x in
B
inverted state.
19-46
Micro Second Channel (MSC)
) Reset Value: 0000 0000
H
23 22 21 20
SL11 SL10
rw rw
7 6 5 4
SL3 SL2
rw rw
TC1728
19 18 17 16
SL9 SL8
rw rw
3 2 1 0
SL1 SL0
rw rw
V1.0, 2011-12
H