Infineon Technologies TC1728 User Manual page 1164

pin SCLK must be switched to input mode. The output of the master's shift register is
connected to the external transmit line, which in turn is connected to the slaves' shift
register input. The output of the slaves' shift register is connected to the external receive
line in order to enable the master to receive the data shifted out of the slave. The external
connections are hard-wired, with the function and direction of these pins determined by
the master or slave operation of the individual device.
Note: The shift direction shown in
operation.
When initializing the devices in this configuration, one device must be selected for
master operation while all other devices must be programmed for slave operation.
Initialization includes the operating mode of the device's SSC and also the function of
the respective port lines.
Master
Shift Register
Clock
Figure 18-4 SSC Full-Duplex Configuration
The data output pins MRST of all slave devices are connected onto one receive line in
this configuration. During a transfer, each slave shifts out data from its shift register.
There are two ways to avoid collisions on the receive line due to different slave data:
User's Manual
SSC, V1.41 2010-06
Figure 18-4
Device #1
MTSR Transmit
Receive
MRST
CLK Clock
18-7
Synchronous Serial Interface (SSC)
applies to both MSB-first and LSB-first
Device #2
MTSR
MRST
CLK
Device #3
MTSR
MRST
CLK
TC1728
Slave
Shift Register
Clock
Slave
Shift Register
Clock
MCA06216
V1.0, 2011-12