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TC1728
Asynchronous/Synchronous Serial Interface (ASC)
17.1.2
General Operation
The ASC supports full-duplex asynchronous communication up to Mbit/s and
half-duplex synchronous communication up to Mbit/s (@ MHz module clock). In
Synchronous Mode, data is transmitted or received synchronous to a shift clock
generated by the microcontroller. In Asynchronous Mode, 8-bit or 9-bit data transfer,
parity generation, and the number of stop bits can be selected. Parity, framing, and
overrun error detection are provided to increase the reliability of data transfers.
Transmission and reception of data are double-buffered. For multiprocessor
communication, a mechanism is included to distinguish address bytes from data bytes.
Testing is supported by a loop-back option. A 13-bit baud rate generator provides the
ASC with a separate serial clock signal, which can be accurately adjusted by a prescaler
implemented as fractional divider.
A transmission is started by writing to the Transmit Buffer Register, TBUF. Only the
number of data bits determined by the selected operating mode will actually be
transmitted; that is, bits written to positions 9 through 15 of register TBUF are always
insignificant. Data transmission is double-buffered, so a new character may be written to
TBUF before the transmission of the previous character is complete. This allows a back-
to-back transmission of characters to take place without gaps.
Data reception is enabled by the receiver enable bit CON.REN. After a reception has
been completed, the received data and, if provided by the selected operating mode, the
received parity bit can be read from the (read-only) receive buffer register RBUF.
Unused bits in the upper half of RBUF that are not required in the selected operating
mode will be read as zeros.
Data reception is double-buffered, so that reception of a second character may already
begin before the previously received character has been read out of the receive buffer
register. In all modes, receive buffer overrun error detection can be selected through bit
CON.OEN. When enabled, the overrun error status flag CON.OE and the error interrupt
request line EIR will be activated when the receive buffer register has not been read by
the time reception of a second character is complete. In this case, the previously
received character in the receive buffer is overwritten.
The loop-back option (selected by bit CON.LB) allows the data currently being
transmitted to be received simultaneously in the receive buffer. This may be used to test
serial communication routines at an early stage without having to provide an external
network. In loop-back mode, the alternate input/output function of port pins is not
required.
User's Manual
17-3
V1.0, 2011-12
ASC, V1.3 2007-11
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