Frame Formats And Definitions - Infineon Technologies TC1728 User Manual

32-bit single-chip microcontroller
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The emergency stop input line EMGSTOPMSC is used to indicate an emergency stop
condition of a power device. In emergency case, shift register bits can be loaded bit-wise
from the downstream data register instead from the ALTINL and ALTINH buses.

19.1.2.1 Frame Formats and Definitions

This section describes the frame formats and definitions of the MSC.
Basic Definitions
Figure 19-4
shows the layout and definitions of a downstream frame. A downstream
frame is composed of an active phase and a passive phase. During the active phase,
data transmission takes place and during the passive phase no data is transmitted at
SO. The active phase is split into two parts: The SRL active phase in which the content
of the shift register low part SRL is transmitted, and the SRH active phase in which the
content of the shift register high part SRH is transmitted. At the beginning of the SRL and
SRH active phase, a selection bit (SELL) can be optionally inserted into the serial data
stream. In the frame shown in
SRL active phase (not for the SRH active phase). The least significant bits of SRL and
SRH are sent out first.
Selection Bit
FCL
SO
SELL
Figure 19-4 Downstream Channel Frame
The MSC downstream channel uses three types of frame formats for operation:
Command frames, indicated by SELL = 1
Data frames, indicated by SELL = 0 or SELL bit insertion disabled
Passive time frame, indicated by ENL = ENH = 0
User's Manual
MSC, V1.37 2009-05
Figure
SRL.0
SRL.1
SRL Active Phase
Active Phase
19-4, SELL is generated at the beginning of the
t
FCL
SRL.n
SRH.0
SRH.1
SRH Active Phase
Downstream Frame
19-6
Micro Second Channel (MSC)
min. 2
SRH.m
Passive Phase
TC1728
t
FCL
MCT06230
V1.0, 2011-12

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