Bit Timing Analysis - Infineon Technologies TC1728 User Manual

32-bit single-chip microcontroller
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CAN node 0
CAN node 1
CAN node x
Figure 20-13 Loop-Back Mode

20.3.7.3 Bit Timing Analysis

Detailed analysis of the bit timing can be performed for each CAN node using the
analysis modes of the CAN frame counter. The bit timing analysis functionality of the
frame counter may be used for automatic detection of the CAN baud rate, as well as to
analyze the timing of the CAN network.
Bit timing analysis for CAN node x is selected when bit field NFCRx.CFMOD = 10
timing analysis does not affect the operation of the CAN node.
The bit timing measurement results are written into the NFCRx.CFC bit field. Whenever
NFCRx.CFC is updated in bit timing analysis mode, bit NFCRx.CFCOV is also set to
indicate the CFC update event. If NFCRx.CFCIE is set, an interrupt request can be
generated (see
Figure
User's Manual
MultiCAN, V2.24
Controller Area Network Controller (MultiCAN)
NPCR0.LBM
0
1
NPCR1.LBM
0
1
.
.
.
NPCRx.LBM
0
1
20-10).
20-33
internal CAN bus
CAN Bus x-1
MultiCAN_loop_back_x.vsd
TC1728
CAN Bus 0
CAN Bus 1
.
.
.
. Bit
B
V1.0, 2011-12

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