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Data Types Supported
•
WORD (32-bit): The default data type; used for single word transfers and block
transfers.
•
HWORD (16-bit): For reading 16-bit registers without getting a bus error, a dedicated
IOClient instruction is provided.
•
BYTE (8-bit): If the DAP/JTAG host wants to read a byte, it has to read the associated
word or half-word. Then the host has to extract the part needed itself.
16.3.2
Communication Mode
In Communication Mode, the Cerberus has no access to the internal buses and
communication is established between the external DAP/JTAG host and a software
monitor (embedded into the application program) via the Cerberus registers. The
communication mode is the default mode after reset.
In Communication Mode, the external DAP/JTAG host is master of all transactions. The
host requests the monitor to write or read a value to/from the Cerberus register
COMDATA. The difference to RW Mode is that the read or write request is not actively
executed by Cerberus. The request just sets bits in the CPU accessible IOSR register to
signal the monitor that the debugger wants to send or receive a value. The software
monitor has to poll the IOSR register for that.
16.3.3
Triggered Transfers
Triggered transfers can be used to read from or write to a certain memory location when
an OCDS trigger becomes active.
The main application for Triggered Transfers is to trace a certain memory location. This
can be done, when the OCDS of the CPU activates its break out signal, if this memory
location is written by the user program. This event is used as a transfer trigger through
the configuration of the MCBS. Cerberus is configured to read the location on this trigger.
16.3.4
Multi Core Break Switch
In TC1728, there are several sources and targets for break signals. For instance the
OCDS run control of one processor can break the other processor unit. The Multi Core
Break Switch (MCBS) is a part of the Cerberus and allows to propagate break requests
from sources to targets in a generic and flexible way.
interfaces of the MCBS.
User's Manual
OCDS, V1.5
On-Chip Debug Support (OCDS)
Figure 16-4
16-11
TC1728
shows the break signal
V1.0, 2011-12
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