Infineon Technologies TC1728 User Manual page 1285

32-bit single-chip microcontroller
Table of Contents

Advertisement

Downstream Channel Baud Rate
As the clock signal FCL of the synchronous downstream channel is always half the
f
frequency of
, the resulting downstream channel baud rate is defined by:
MSC0
f
Baud rate
=
MSC0
f
Baud rate
=
MSC0
Upstream Channel Baud Rate
The baud rate of the asynchronous upstream channel is derived from the module clock
f
by a programmable clock divider selected by bit field MSC0_USR.URR (see also
MSC0
Equation (19.2)
on
maximum 256.
Baud rate
=
f
MSC0
Baud rate
=
f
MSC0
Equation
(19.3),
Equation
mode (MSC0.FDR.DM = 01
are valid for fractional divider mode (MSC0.FDR.DM = 10
User's Manual
MSC, V1.37 2009-05
×
----------------------------------------------------------------------------------
×
(
SYS
2
1024 - MSC0_FDR.STEP
MSC0_FDR.STEP
×
------------------------------------------------ -
×
SYS
2
1024
Page
19-25). The divide factor DF can be at minimum 4 and at
×
---------------------------------------------------------------------------------------
×
(
SYS
DF
1024 - MSC0_FDR.STEP
MSC0_FDR.STEP
×
------------------------------------------------ -
×
SYS
DF 1024
(19.5), and
).
Equation
B
Micro Second Channel (MSC)
1
)
1
)
Equation (19.7)
(19.4),
Equation
B
19-66
are valid for normal divider
(19.6), and
Equation (19.8)
).
V1.0, 2011-12
TC1728
(19.5)
(19.6)
(19.7)
(19.8)

Advertisement

Table of Contents
loading

Table of Contents