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TC1728
Interrupt System
If a new service request is received by the ICU before the CPU has acknowledged the
pending interrupt request, the ICU deactivates the pending request and starts a new
arbitration process. This reduces the latency of service requests posted before the
current request is acknowledged. The ICU deactivates the current pending interrupt
request by setting the ICR.PIPN bit field to 0, indicating that the ICU has not yet found a
new valid pending request. It then executes its arbitration process again. If the new
service request has a higher priority than the previous one, its priority will be written to
ICR.PIPN. If the new interrupt has a lower priority, the priority of the previous interrupt
request will again be written to ICR.PIPN. In any case, the ICU will deliver a new interrupt
request to the CPU according to the rules described in this section.
Once the CPU has acknowledged the current pending interrupt request, any new service
request generated by an SRN must wait at least until the end of the next service request
arbitration process to be serviced.
Essentially, arbitration in the ICU is performed whenever a new service request is
detected, regardless of whether or not the CPU is servicing interrupts. Because of this,
the ICR.PIPN bit field always reflects the pending service request with the highest
priority. This can, for example, be used by software polling techniques to determine high-
priority requests while leaving the interrupt system disabled.
13.3.2
PCP Interrupt Control Unit (PICU)
The PCP Interrupt Control Unit (PICU) is closely coupled with the PCP and its Interrupt
Control Register (PCP_PICR). The operation of the PICU is very similar to the ICU of the
CPU with respect to the overall scheme.
Note: Details of the PICU and the PCP_ICR register are described in the chapter about
the PCP.
User's Manual
13-11
V1.0, 2011-12
Interrupt, V1.4
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