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The four Upstream Data Registers UDx store the content (data, addresses, received and
calculated parity bit, parity error bit) of a received upstream channel data frame.
UDx (x = 0-3)
Upstream Data Register x
31
30
29
28
15
14
13
12
Field
Bits
DATA
[7:0]
V
16
P
17
C
18
LABF
[20:19] rh
IPF
21
User's Manual
MSC, V1.37 2009-05
(30
27
26
25
0
r
11
10
9
0
r
Type Description
rh
Received Data
This bit field contains the 8-bit receive data.
rh
Valid Bit
This bit is set by hardware when the received data is
written to UDx. Writing bit C = 1 clears V. If hardware
setting and software clearing of the valid bit occur
simultaneously, bit V will be cleared.
rh
Parity Bit
This flag contains the parity bit that has been received
with the data frame.
w
Clear Bit
0
No operation.
B
1
Bit V is cleared.
B
C is always read as 0.
Lower Address Bit Field
This bit field contains the two address bits A[1:0] of the
4-bit address field (16-bit data frame). If 12-bit data
frame is selected, LABF is always set to 00
rh
Internal Parity Flag
This bit contains the parity bit that has been calculated
in the MSC during data frame reception.
Micro Second Channel (MSC)
+x*4
)
H
H
24
23
22
21
P
IPF
ERR
rh
rh
8
7
6
5
19-60
TC1728
Reset Value: 0000 0000
20
19
18
17
LABF
C
P
rh
w
rh
4
3
2
1
DATA
rh
.
B
V1.0, 2011-12
H
16
V
rh
0
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