Synchronous Host Port Mode; Expansion Bus Pin Description (Synchronous Host Port Mode) - Texas Instruments TMS320C6201 Reference Manual

Expansion Bus Host Port Operation
8.5.2

Synchronous Host Port Mode

Table 8–16. Expansion Bus Pin Description (Synchronous Host Port Mode)
Signal Signal
Symbol Type
XCLKIN I
XCS I
XHOLD I/O/Z
XHOLDA I/O/Z
8-26
In this mode host port has address and data signals multiplexed and is i960Jx
compatible. This allows a minimum glue interface to the PCI bus, since major
PCI interface chip manufacturers adopted the i960 bus for local bus on their
chips.
The synchronous host port can also easily interface to many other common
processors, and essentially act in a slave only mode. This is done by simply
not initiating transactions on the expansion bus.
The 'C6202 expansion bus has the capability to initiate and receive burst trans-
fers.
Table 8–16 lists pin function in the expansion bus synchronous host port
mode:
Signal Signal
Count Name
1 Clock
Input
1 Chip
Select
1 Hold
Request
1 Hold
acknowledge
Signal Function
Expansion bus clock (maximum clock speed is 1/4 of the
CPU clock speed.
Selects the 'C6202 as a target of an external master.
Case 1 (Internal bus arbiter enabled)
XHOLD is asserted by external device to request use of the
expansion bus. The 'C6202 asserts XHOLDA when control
is granted.
Case 2 (Internal bus arbiter disabled)
The 'C6202 wakes up from reset as slave on the bus.
XHOLD is asserted by 'C6202 to request use of the
expansion bus. The expansion bus arbiter asserts
XHOLDA when control is granted.
Case 1 (Internal bus arbiter disabled)
The 'C6202 wakes up from reset as slave on the bus.
The expansion bus arbiter asserts XHOLDA when control
is granted in response to XHOLD. The bus should not be
granted to 'C6202 unless requested by XHOLD.
Case 2 (Internal bus arbiter enabled)
The 'C6202 wakes up from reset as master of the bus.
XHOLDA is asserted by the 'C6202 when control is granted
in response to XHOLD.