Peripheral I/O Area - Renesas NU85E Preliminary User's Manual

(a) RAM area size = 0 KB (RAM-less)
Set the RAM area size to 4 KB and handle the VDB pins as indicated in 2.3 Recommended Connection
of Unused Pins.
(b) 0 KB < RAM area size < 4 KB
Set the RAM area size to 4 KB and use from the lower side addresses as RAM area.
(c) 4 KB < RAM area size < 12 KB
Set the RAM area size to 12 KB and use from the lower side addresses as RAM area.
(d) 12 KB < RAM area size < 28 KB
Set the RAM area size to 28 KB and use from the lower side addresses as RAM area.
(e) 28 KB < RAM area size < 60 KB
Set the RAM area size to 60 KB and use from the lower side addresses as RAM area.
(f) 60 KB < RAM area size
A RAM area size exceeding 60 KB cannot be set.
Example Memory map when 8 KB RAM is used.
xFFEFFFH
xFFE000H
xFFDFFFH
xFFC000H

3.4.3 Peripheral I/O area

In 64 MB mode, the area at address 3FFFFFFH and below is reserved as a peripheral I/O area. In 256 MB mode,
the address at FFFFFFFH and below is reserved.
Peripheral I/O registers to which functions have been assigned such as status monitoring or specification of the
operating mode of the NU85E, memory controller (MEMC), or instruction/data cache are located in this area.
For information about assigned registers, see 3.5 Peripheral I/O Registers.
Caution User-defined addresses must be assigned to the following areas only (user-usable area); all other
addresses are reserved and cannot therefore be used.
• • • • xFFF200H to xFFF47FH
• • • • xFFF520H to xFFF7BFH
• • • • xFFF800H to xFFFFFFH
CHAPTER 3 CPU
The 8 KB from
lower side
RAM area
addresses are
RAM area
Preliminary User's Manual A14874EJ3V0UM
The RAM area size
is set to 12 KB
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