Renesas NU85E Preliminary User's Manual page 144

32-bit microprocessor core
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Table 6-3. Operation After Setting Software STOP Mode in Interrupt Servicing Routine
Interrupt Servicing Routine Type
When Software STOP Mode Is Set
Maskable interrupt
Non-maskable interrupt
Notes 1. The priority order of the interrupts when software STOP mode is set (interrupts that were under
servicing).
2. When the ID bit of the PSW is 1 (interrupt acknowledgement disabled)
3. When the ID bit of the PSW is 0 (interrupt acknowledgement enabled)
Remark Cancellation of software STOP mode by NMI is performed regardless of the NP bit value in the PSW.
(b) Cancellation by DCRESZ signal input
This is the same as a normal reset operation.
Caution Be sure to input the DCRESZ signal so that the setup and hold times referenced to the
VBCLK signal are satisfied.
142
CHAPTER 6 STBC
Cancellation Source
Priority
Maskable
Low
interrupt
Same
request
High (ID = 1)
High (ID = 0)
Non-maskable
interrupt
request
Maskable
interrupt
request
Non-maskable
Low
interrupt
Same
request
High
Preliminary User's Manual A14874EJ3V0UM
Operation
Note 1
Software STOP mode is canceled
and the interrupt request is not
acknowledged (pending).
Note 2
Note 3
Software STOP mode is canceled
and the interrupt request is
acknowledged.
Software STOP mode is canceled
and the interrupt request is not
acknowledged (pending).
Software STOP mode is canceled
and the interrupt request is
acknowledged.

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