Rcu Pins; Peripheral Evaluation Chip Mode Pins - Renesas NU85E Preliminary User's Manual

2.2.10 RCU pins

(1) DBI5 to DBI0 (input)
These are debug control input pins. They are connected to the DBI5 to DBI0 pins of the RCU.
(2) DBO14 to DBO0 (output)
These are debug control output pins. They are connected to the DBO14 to DBO0 pins of the RCU.
(3) DBB15 to DBB0 (input/output)
These are debug control I/O pins. They are connected to the DBB15 to DBB0 pins of the RCU.

2.2.11 Peripheral evaluation chip mode pins

If a high-level signal is input to the PHEVA pin, the NU85E is set to peripheral evaluation chip mode.
In peripheral evaluation chip mode, the ASIC in which the NU85E is incorporated is used as a peripheral
emulation chip when the in-circuit emulator is used to perform debugging.
The peripheral evaluation chip mode pins constitute an interface with the evaluation chip within the in-circuit
emulator, and various evaluation chip signals are converted to NPB signals via these pins.
(1) EVASTB (input)
This is the address strobe input pin. It is connected to the EPHASTB pin of the evaluation chip.
(2) EVDSTB (input)
This is the data strobe input pin. It is connected to the EPHDSTB pin of the evaluation chip.
(3) EVAD15 to EVAD0 (input/output)
These pins constitute an address/data bus. They are connected to the EPHADn pins of the evaluation chip (n =
15 to 0).
(4) EVIEN (output)
This pin outputs an input enable signal for controlling the direction of the I/O buffer on the EVADn bus (n = 15 to
0).
(5) EVOEN (output)
This pin outputs an output enable signal for controlling the direction of the I/O buffer on the EVADn bus (n = 15
to 0).
(6) EVLKRT (input/output)
This is the lock/retry input/output pin. It is connected to the EPHLKRT pin of the evaluation chip.
(7) EVIREL (input)
This is the standby release input pin.
(8) EVCLRIP (input)
This is the ISPR clear input pin. It is connected to the ECLRIP pin of the evaluation chip.
(9) EVINTAK (input)
This is the interrupt acknowledge input pin. It is connected to the EINTAK pin of the evaluation chip.
(10) EVINTRQ (output)
This is the interrupt request output pin. It is connected to the EINTRQ pin of the evaluation chip.
CHAPTER 2 PIN FUNCTIONS
Preliminary User's Manual A14874EJ3V0UM
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