Data Area; Data Area (64 Mb Mode) - Renesas NU85E Preliminary User's Manual

3.3.2 Data area

For operand addressing (data access), the CPU of the NU85E supports a linear address space (data area) with a
maximum size of 4 GB.
The ROM, RAM, and peripheral I/O areas are each located in 64 MB or 256 MB address spaces. The size setting
is selected according to the input level to the IFID256 pin.
(1) 64 MB mode
When a low-level signal is input to the IFID256 pin, the data area is set to 64 MB mode.
In this mode, the 64 MB physical address space can be viewed as 64 images in the 4 GB address space. That
is, the same 64 MB physical address space is accessed regardless of the values of bits 31 to 26 of the CPU
address.
FFFFFFFFH
Data area
(4 GB)
04000000H
03FFFFFFH
00000000H
Note When a low-level signal is input to the IFIROME pin, this is also used as the external memory area.
When a high-level signal is input to the IFIROB2 pin, this is also used as the external memory area, and
the ROM area is located in the 1 MB area starting at address 0100000H.
60
CHAPTER 3 CPU
Figure 3-7. Data Area (64 MB Mode)
3FFFFFFH
Image
3FFF000H
3FFEFFFH
Image
0100000H
00FFFFFH
Image
Image
0000000H
Preliminary User's Manual A14874EJ3V0UM
Peripheral I/O
area (4 KB)
RAM area
(4, 12, 28,
or 60 KB)
External Program area
memory area (64 MB)
ROM area
Note
(1 MB)