Data Area (256 Mb Mode) - Renesas NU85E Preliminary User's Manual

(2) 256 MB mode
When a high-level signal is input to the IFID256 pin, the data area is set to 256 MB mode.
In this mode, the 256 MB physical address space can be viewed as 16 images in the 4 GB address space. That
is, the same 256 MB physical address space is accessed regardless of the values of bits 31 to 28 of the CPU
address.
FFFFFFFFH
4 GB
10000000H
0FFFFFFFH
00000000H
Notes 1. When a low-level signal is input to the IFIROME pin, this is also used as the external memory area.
When a high-level signal is input to the IFIROB2 pin, this is also used as the external memory area,
and the ROM area is located in the 1 MB area starting at address 0100000H.
2. When data is written to the RAM area at address FFFEFFFH and below in 256 MB mode, data
having the same contents is also written to the area at address 3FFEFFFH and below, which is
indicated by "Same area" in the figure. The contents of these areas are linked (a memory access is
performed from the RAM area at address 3FFEFFFH and below).
Caution Addresses 3FFF000H to 3FFFFFFH are an access prohibited area.
guaranteed when that area is accessed.
CHAPTER 3 CPU
Figure 3-8. Data Area (256 MB Mode)
FFFFFFFH
Image
FFFF000H
FFFEFFFH
4000000H
3FFFFFFH
3FFF000H
3FFEFFFH
Image
0100000H
00FFFFFH
Image
Image
0000000H
Preliminary User's Manual A14874EJ3V0UM
Peripheral I/O
area (4 KB)
RAM area
(4, 12, 28,
or 60 KB)
External
memory area
Same area
Access
prohibited area
RAM area
(4, 12, 28,
256 MB
or 60 KB)
External
memory area
ROM area
Note 1
(1 MB)
The operation is not
Note 2
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