Table of Contents
Advertisement
Figure 4-12. BPC, BSC, BEC, BHC Register Setting Example (2/3)
%+&
CSn area
Addresses
0
0000000H to
03FFFFFH
1
0800000H to
0FFFFFFH
2
0400000H to
07FFFFFH
3
1000000H to
1FFFFFFH
4
2000000H to
2FFFFFFH
5
3E00000H to
3FFFFFFH
6
3000000H to
39FFFFFH
7
3A00000H to
3DFFFFFH
92
CHAPTER 4 BCU
(d) BHC register setting
(e) Settings of each CSn area
Banks
VDCSZn signal
0, 1
VDCSZ0
4, 5
VDCSZ1
2, 3
VDCSZ2
6, 7
VDCSZ3
8, 9
VDCSZ4
15
VDCSZ5
10 to 12
VDCSZ6
13, 14
VDCSZ7
Preliminary User's Manual A14874EJ3V0UM
,QVWUXFWLRQ FDFKH VHWWLQJ RI &6Q DUHD
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
'DWD FDFKH VHWWLQJ RI &6Q DUHD
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
&6 DUHD &DFKH QRW DYDLODEOH
VSB data bus
Endian format
size (bits)
32
Little endian
32
Little endian
8
Little endian
8
Big endian
16
Little endian
16
Little endian
32
Little endian
32
Big endian
Cache setting
Instruction
Data
No
No
Yes
No
No
Yes
No
No
No
No
No
No
No
No
No
No
Advertisement
Table of Contents
