Renesas NU85E Preliminary User's Manual page 52

Pin Name
Data IDDARQ
cache pins
IDAACK
IRRSA
IDRETR
IDUNCH
IDDRDY
IDED31 to
IDED0
IDES
RCU pins DBO14
DBO13
DBO12 to DBO5
DBO4
DBO3 to DBO1
DBO0
DBB15 to DBB0
Peripheral EVIEN
evaluation
EVOEN
chip mode
EVINTRQ
pins
EVINTLV6 to
EVINTLV0
EVAD15 to
EVAD0
EVLKRT
Test mode TBO34 to TBO0
pins
BUNRIOUT
TESEN
VPTCLK
PHTDIN1,
PHTDIN0
VPRESZ
PHTEST
TMODE1,
TMODE0
TBREDZ
Note When a low level is input to the DCRESZ pin and an external clock is input to the VBCLK pin.
Remark L: Low-level output
H: High-level output
Retained: Retains status immediately before
Hi-Z: High-impedance
50
CHAPTER 2 PIN FUNCTIONS
Table 2-10. Pin Status in Each Operating Mode (3/3)
Note
Reset Software
STOP Mode
L L
L L
L Undefined
L L
Undefined Undefined
L L
Undefined Undefined
Undefined Undefined
H L
L L
Undefined Retained
L L
L L
L Retained
Undefined Retained
Undefined L
Undefined L
L Retained
Undefined Retained
Undefined Retained
Undefined Retained
Hi-Z Hi-Z
L L
L L
L L
L L
L H
L L
L L
H H
Preliminary User's Manual A14874EJ3V0UM
Pin Status
Hardware HALT Mode
STOP Mode
L L
L L
Undefined Undefined
L L
Undefined Undefined
L L
Undefined Undefined
Undefined Undefined
L L
L L
Retained Retained
L H
L L
Retained Retained
Retained Retained
L L
L L
Retained Operates
Retained Operates
Retained Undefined
Retained Undefined
Hi-Z Hi-Z
L L
L L
L L
L L
H H
L L
L L
H H
Standby Unit Test
Test Mode Mode
Undefined Operates
Undefined Operates
Undefined Operates
Undefined Operates
Undefined Operates
Undefined Operates
Undefined Operates
Undefined Operates
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Undefined Undefined
Hi-Z Operates
H H
L Operates
L Operates
L Operates
Undefined Undefined
L Operates
L Operates
H Operates