Maskable Interrupt Priorities - Renesas NU85E Preliminary User's Manual

32-bit microprocessor core
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8.3.3 Maskable interrupt priorities

The INTC provides multiple interrupt service that acknowledges another interrupt while an interrupt is being
serviced. Multiple interrupts can be controlled according to priorities.
Priority control includes control according to default priorities and programmable priority control according to the
interrupt control register (PICn). For priority control according to default priorities, if multiple interrupts having the
same priority level according to the PICn register are generated at the same time, the interrupts are serviced
according to the priorities (default priorities) that have been assigned in advance to each interrupt request (see Table
8-1 Interrupt/Exception List). For programmable priority control, the interrupt requests are divided into eight levels
according to PICn register settings.
When an interrupt is acknowledged, the ID flag of the PSW is automatically set (1). Therefore, to use multiple
interrupt service, clear (0) the ID flag (such as by executing the EI instruction during the interrupt service program) to
set the interrupt enable state.
CHAPTER 8 INTC
Preliminary User's Manual A14874EJ3V0UM
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