Example Of Flyby Single Transfer Timing (From External Sram To External I/O Connected To Nt85E500) - Renesas NU85E Preliminary User's Manual

Figure 7-36. Example of Flyby Single Transfer Timing (from External SRAM to External I/O Connected to NT85E500)
VMTTYP1, VMTTYP0
VMA27 to VMA0 (Output)
VBDI31 to VBDI0 (Input)
VBDO31 to VBDO0 (Output)
VMWRITE (Output)
VMBENZ3 to VMBENZ0
VMCTYP2 to VMCTYP0
VMSEQ2 to VMSEQ0
VMSIZE1, VMSIZE0
VMLOCK (Output)
VDCSZ7 to VDCSZ0
DMACTVn (Output)
DMTCOn (Output)
A25 to A0 (Output) Note
DI31 to DI0 (Input) Note
DO31 to DO0 (Output) Note
RDZ (Output) Note
WRZ3 to WRZ0 (Output) Note
CSZ7 to CSZ0 (Output) Note
IORDZ (Output) Note
IOWRZ (Output) Note
Note These are NT85E500 signals.
1st
TA T1 TW
VBCLK (Input)
0H 2H 2H 3H
(Output)
L
L
VMSTZ (Output)
L
FH 0H
(Output)
7H
(Output)
0H
(Output)
2H
(Output)
L
VBDC (Output)
VBDV (Output) L
FFH FBH
(Output)
VMWAIT (Input)
VMAHLD (Input) L
VMLAST (Input) L
DMARQn (Input)
L
FFH FBH
H
CPU cycle
T2 T3 TI TA T1
0H 2H
FH
FFH
FH
FFH
2nd
TW T2 T3 TI
3H
0H FH
7H
0H
2H
FBH FFH
FBH FFH