Table of Contents
Advertisement
2.2 Explanation of Pin Functions
2.2.1 NPB pins
(1) VPA13 to VPA0 (output)
These are pins from which addresses are output to peripheral macros connected to the NPB. They specify the
lower 14 bits.
(2) VPDI15 to VPDI0 (input)
These are pins to which data is input from peripheral macros connected to the NPB.
(3) VPDO15 to VPDO0 (output)
These are pins from which data is output to peripheral macros connected to the NPB.
(4) VPWRITE (output)
This is the write access strobe output pin for the VPDO15 to VPDO0 signals.
During writing, a high level is output.
(5) VPSTB (output)
This is the data strobe output pin.
(6) VPLOCK (output)
This is the bus lock output pin. If an interrupt request occurs while a read modify write access to the interrupt
control register (PICn) is executed, this pin outputs a bus lock signal to avoid loss of the interrupt request.
It outputs a high level during a read modify write access.
Even when an interrupt request occurs, transfer to the PIFn flag of the PICn register is not performed while this
signal outputs a high level (n = 0 to 63).
(7) VPUBENZ (output)
This is the higher byte enable output pin. It outputs a low level during a halfword data access or a byte data
access to an odd address.
It outputs a high level during a byte access to an even address.
(8) VPRETR (input)
This is the pin to which retry requests are input from peripheral macros connected to the NPB. If a high level is
input to this pin and to the VPDACT pin at the falling edge of the VPSTB signal, the read/write operation is
performed again.
(9) VPDACT (input)
This pin, which is an input pin for input from an external address decoder, is used to enable the retry function.
When a high level is input, the retry function is enabled.
When a low level is input, any retry request by VPRETR input will be ignored.
(10) VPDV (output)
This is the data output (VPDO15 to VPDO0) control signal output pin. It outputs a high level during write. To
configure a bidirectional data bus, connect this pin to the 3-state buffer enable pin connected to the data bus for
data output control.
CHAPTER 2 PIN FUNCTIONS
Preliminary User's Manual A14874EJ3V0UM
29
Advertisement
Table of Contents
