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(11) T1FHI state
This is the last state of a flyby transfer, and the DMAC is awaiting the end of the transfer.
After the T1FHI state, the bus is released, and the DMAC transitions to the TE state.
(12) T2FH state
This is the state in which the DMAC judges whether or not to continue flyby transfers.
If the next transfer is executed in block transfer mode, the DMAC moves to the T1FH state after the T2FH state.
In other modes, if a wait has occurred, the DMAC transitions to the T1FHI state. If no wait has occurred, the bus
is released, and the DMAC transitions to the TE state.
(13) TE state
This is the state in which the DMA transfer is completed.
(DMTCOn) and initializes other types of internal signals (n = 3 to 0). After the TE state, the DMAC always
transitions to the TI state.
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CHAPTER 7 DMAC
Preliminary User's Manual A14874EJ3V0UM
The DMAC generates a terminal count signal
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