VBCLK (Input)
IROMEN (Output)
IROMA19 to IROMA2
(Output)
IROMZ31 to IROMZ0
(Input)
Note Data should be retained from when the IROMEN output becomes high level until the VBCLK signal rises.
Remarks 1. Ax: Arbitrary address
Dx: Data corresponding to address "Ax"
2.
: ROM data sampling timing
APPENDIX A ROM/RAM ACCESS TIMING
Figure A-1. ROM Access Timing
A0
A1
A2
D0
D1
Preliminary User's Manual A14874EJ3V0UM
A3
Hold
A4
Note
D2
D3
A5
D4
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