Example Of Recommended Circuit When Connecting Nb85E901 And Nu85E; Example Of Recommended Circuit For Ie Connection (Nu85E + Nb85E901) - Renesas NU85E Preliminary User's Manual

10.5.2 Example of recommended circuit when connecting NB85E901 and NU85E

Figure 10-4 shows an example of the circuit recommended for IE connector section (target system side).
Figure 10-4. Example of Recommended Circuit for IE Connection (NU85E + NB85E901)
ASIC
NU85E + NB85E901
DCK
DMS
DDI
DDO
DRSTZ
DBINT
Notes 1. Make the clock pattern length as short as possible, and shield it by surrounding it with GND. Avoid
exceeding a pattern length of 100 mm.
2. Make the pattern length as short as possible. Avoid exceeding a pattern length of 100 mm.
3. Recommended buffer: SN74LVC541A (product of TI Corporation) or TC74LCX541F (product of
Toshiba Corporation)
4. An output buffer with a drive capability of at least 6 mA is recommended.
Remarks 1. The V
DD
power has been applied to the target system.
2. The DBINT pin is optional. However, because the DBINT pin is necessary for testing, it must be
output off the chip as an external pin, even when not being used (the DBINT pin can be used as
the alternate function of a pin other than the test bus pins (TBI39 to TBI0, TBO34 to TBO0)).
When it is unnecessary to input a debug interrupt externally, input a low level to this pin.
246
CHAPTER 10 NB85E901
+3.3 V
4.7 k
Note 1
Note 2
Note 2
Note 3
Note 2
Note 4
50 k
External event
detection device, etc.
pin (pin B13) of the IE connector (target system side) is only used to detect whether
Preliminary User's Manual A14874EJ3V0UM
IE connector
(target system side)
8830E-026-170S/L
A1
TRCCLK
A2
TRCDATA0
A3
TRCDATA1
A4
TRCDATA2
A5
TRCDATA3
A6
TRCEND
Ω
A8
DCK
A9
DMS
A7
DDI
Ω
A10
22
DDO
A11
3 V buffer
DRSTZ
Ω
+3.3 V
B13
V
DD
A12
(Reserved) (Open)
A13
(Reserved) (Open)
B11
(Reserved) (Open)
B12
(Reserved) (Open)
B1 to B10
GND