Peripheral I/O Area And Programmable Peripheral I/O Area - Renesas NU85E Preliminary User's Manual

Figure 4-5. Peripheral I/O Area and Programmable Peripheral I/O Area
(a) 64 MB mode
3FFFFFFH
Peripheral I/O area
3FFF000H
3FFEFFFH
xxxnFFFH
(n = yy11B)
xxxm000H
(m = yy00B)
0000000H
Note See Figure 3-8 Data Area (256 MB Mode).
Remarks 1. xxx: Setting according to the PA13 to PA02 bits of the BPC register
yy: Setting according to the PA01 and PA00 bits of the BPC register
2. Since the areas indicated by "same area" are linked, if data is written in one area, data having
the same contents is also written in the other area.
84
CHAPTER 4 BCU
Same
(4 KB)
area
(4 KB)
Programmable
peripheral I/O area
(12 KB)
Preliminary User's Manual A14874EJ3V0UM
(b) 256 MB mode
FFFFFFFH
Peripheral I/O area
FFFF000H
FFFEFFFH
Same
(RAM area)
area
Note
xxxnFFFH
(n = yy11B)
Programmable
peripheral I/O area
(12 KB)
xxxm000H
(m = yy00B)
3FFF000H
3FFEFFFH
0000000H
Same
(4 KB)
area
(4 KB)