Program Counter (Pc) - Renesas NU85E Preliminary User's Manual

(2) Program counter
This register holds the instruction address during program execution. The lower 26 bits are valid, and bits 31 to
26 are reserved for future function expansion (fixed at 0). If a carry from bit 25 to bit 26 occurs, it is ignored.
Also, bit 0 is fixed at 0, and no branching to an odd address can be performed.
31 26 25
PC 0 0 0 0 0 0
54
CHAPTER 3 CPU
Figure 3-2. Program Counter (PC)
Instruction address during program execution
Preliminary User's Manual A14874EJ3V0UM
1 0
After reset
0
00000000H