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(20) VBDC (output)
This is data input (VBDI31 to VBDI0) control signal output pin. This pin outputs a high level during a read cycle
and during DMA flyby transfer from the external memory to the I/O. When connecting a bus slave that has an
I/O separated data bus and a bidirectional data bus, this pin is connected to the enable pin of the 3-state buffer
connected to the data bus for data input control.
(21) VBDV (output)
This is data output (VBDO31 to VBDO0) control signal output pin. This pin outputs a high level during a write
cycle and during DMA flyby transfer from the I/O to the external memory. When configuring a bidirectional data
bus, this pin is connected to the enable pin of the 3-state buffer connected to the data bus for data output
control.
(22) VDCSZ7 to VDCSZ0 (output)
These are low-level active chip select output pins.
Function.
2.2.3 System control pins
(1) DCRESZ (input)
This is the clock-synchronized system reset input pin.
When the stable input clock rising edge is detected five times after a low level was input to this pin, the pin
statuses and internal signals are completely initialized (The time required until the statuses of the internal signals
and each pin are stabilized is 5 clocks or less depending on the pin. Noise elimination is not performed.). Also,
when the input clock rising edge is detected four times after this signal has risen from low level to high level, the
pipeline is cleared and program execution starts from memory address 0.
In addition to normal initialization and start operations, this pin is used to cancel the power save function.
Caution Be sure to input the DCRESZ signal so that the setup and hold times referenced to the VBCLK
signal are satisfied.
Note
VBCLK (input)
DCRESZ (input)
Internal system
reset signal
Completion of initialization
Note Input at least five clocks of the VBCLK signal while the DCRESZ signal is low level. Always input a
stable clock to the VBCLK pin.
34
CHAPTER 2 PIN FUNCTIONS
Figure 2-1. Acknowledgement of DCRESZ Signal
Start of program execution
Preliminary User's Manual A14874EJ3V0UM
For details, refer to 4.3 Programmable Chip Select
Note
Completion of initialization
Start of program execution
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